Correctable errors are the errors which may have an impact on performance (like latency, bandwidth), but no data/information is lost and PCIe fabric remains reliable. Such errors are corrected by ...

The sub-system is composed of the PCIe core, the GT interface and the AXI4 interface. The bridge circuit is implemented in the FPGA fabric and the PCIe core and GT are hard-core elements in the FPGA.