Replay buffer size – PCIe provides CRC protection for all Transaction Layer Packets (TLPs) and specifies packet replay mechanism if CRC errors are detected by the receiver. All TLPs are stored in an ...
The sub-system is composed of the PCIe core, the GT interface and the AXI4 interface. The bridge circuit is implemented in the FPGA fabric and the PCIe core and GT are hard-core elements in the FPGA.