Design-Reuse18 天
GSMC 0.13um Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Via1 ROM ...
VeriSilicon GSMC Synchronous Memory Compiler uses four layers within the blocks and supports metal 5, 6 or 7 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability ...
Design-Reuse18 天
SMIC 0.18um Single-Port/Dual-Port SRAM, Two-Port Register File and Diffusion ROM Compiler
VeriSilicon SMIC 0.18um Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, or 6 as the top metal. Dummy bit cells are synthesized with the intention to enhance ...