DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process The OT3910 is a set of cells for implementing 800Mb DDR (400MHz) LVDS IO in 180n ...

Digital delay-locked loop (DLL ... Combined with its leading-edge cell-based ASIC offerings, NEC Electronics aims to deliver ASIC solutions that are well matched to the varying needs of its worldwide ...